RISCV is an open instruction set. You don’t need to ask for the “code” from ARM / Intel etc for their MISC or CISC instructions.

This way, you can make it cheaper and easier from a set of “ingredients” and be more likely for collaboration and reusablitity (AFAIK) between vendors.

https://en.m.wikipedia.org/wiki/RISC-V#rationale

RISC is simpler than x86 and thus more resource efficient at the cost of compute power

And I don’t fully understand why but x86 is kinda shit because of how bloated it is amongst other reasons and modern Intel x86 chips actually translate the x86 ISA to RISC internally within the chip

Its like arm(aimed at more power efficient computation), but anyone is free to pick up its design without needing to license it.