Small RISC-V cores are weirdly all over the place. I think NXP and some others have a RISC-V core inside some of their ARM cores as their security coprocessors and other peripherals. The architecture is getting around it’s just not hitting much toward the application processor yet. It’s getting there but running a full on PC is such a complex task over micros or special purpose devices.
It’s getting there but running a full on PC is such a complex task over micros or special purpose devices.
Design application ready CPUs are hard, but not really for these companies. The main issue was the need for a standard, given how many optional extensions are available for RISC-V. The RVA profiles fix this problem by giving a set of required extensions to be user-mode application ready, and they have been a thing for a while. However, these were lacking one important capability for modern applications: vector extensions. RISC-V already had SIMD support (similar to what x86 has), but the vector extension is so much better there’s really no need to even bother with it except with some microcontrollers .
The RVA23 profile, ratified 4 days ago, addresses this by adding the vector extension to the list of required extensions for an application ready CPU. This should be enough for running modern applications, so maybe we’ll see some nice stuff in the next 1-2 years.
same for AMD graphics since 2019. I wouldn’t be surprised if Intel were doing the same with Arc too, though I haven’t looked into that yet.
Small RISC-V cores are weirdly all over the place. I think NXP and some others have a RISC-V core inside some of their ARM cores as their security coprocessors and other peripherals. The architecture is getting around it’s just not hitting much toward the application processor yet. It’s getting there but running a full on PC is such a complex task over micros or special purpose devices.
Design application ready CPUs are hard, but not really for these companies. The main issue was the need for a standard, given how many optional extensions are available for RISC-V. The RVA profiles fix this problem by giving a set of required extensions to be user-mode application ready, and they have been a thing for a while. However, these were lacking one important capability for modern applications: vector extensions. RISC-V already had SIMD support (similar to what x86 has), but the vector extension is so much better there’s really no need to even bother with it except with some microcontrollers .
The RVA23 profile, ratified 4 days ago, addresses this by adding the vector extension to the list of required extensions for an application ready CPU. This should be enough for running modern applications, so maybe we’ll see some nice stuff in the next 1-2 years.
Absolutely. They’ve been getting really popular in wearables (particularly from Chinese brands).
Several SBC vendors are including rv clusters in ARM based SoCs (which I believe is partially related to what you mentioned) for development purposes.
I even have a little rv powered ssoldering iron 😊